1. Field of the Invention
The invention relates to thin film transistors (TFT), and more particularly to a thin film transistor used as a switching element in an electric charge transfer section for outputting an electric charge generated by photoelectric conversion elements such as high-resolution image sensors.
2. Description of the Related Art
The use of thin film transistors in the electric charge transfer section of image sensors is known in the art. Many conventional image sensors, especially contact type image sensors, are TFT-driven image sensors which employ thin film transistor switching elements. In the conventional TFT-driven image sensor, image data, typically from a document, is divided into a multiplicity of pixels (photoelectric conversion elements) and projected on a one-to-one correspondence basis. The projected image is converted into electric signals, that is, an electric charge is generated by respective photoelectric conversion elements and temporarily stored at interline capacitors for a group of lines forming a predetermined block. The stored electric charges are then sequentially read as electric signals at speeds ranging from several hundred KHz to several MHz. TFT operation allows conventional TFT-driven image sensors to read image data with a single drive IC, thereby contributing to a reduction in the number of drive ICs required by the image sensor.
As shown, for example, in FIG. 7, a TFT image sensor includes: a line-like photoelectric conversion element array 11 whose length is substantially the same as the length of a document; an electric charge transfer section 12 consisting of a plurality of thin film transistors Ti,j (i=1 to N, j=1 to n) corresponding on a one-to-one basis to the respective photoelectric conversion elements 11'; and a group of signal lines 13.
The photoelectric conversion element array 11 consists of N blocks of photoelectric conversion elements. Each block includes n photoelectric conversion elements 11' and can be equivalently represented as a plurality of photodiodes PDi,j (i=1 to N, j=1 to n). Each photoelectric conversion element 11' is connected to the drain electrode of a corresponding thin film transistor Ti,j. The source electrode of each thin film transistor Ti,j is connected to one of n common signal lines 14 through a matrixed line group 13. The gate electrode of each thin film transistor Ti,j is connected to a gate pulse generating circuit (not shown). The photoelectric charge generated at each photoelectric conversion element 11' is temporarily stored in a parasitic capacitor formed in each photoelectric conversion element and in an overlap capacitor formed between the drain and gate of each thin film transistor. For each block, the stored charge is sequentially transferred to and thereafter stored in the interline capacitors Ci (i=1 to n) of the line group 13. Charge transfer is accomplished using thin film transistor Ti,j as electric charge transfer switches.
Specifically, a gate pulse .phi.G1 from gate pulse generating circuit turns on thin film transistors T1,1 to T1,n, thereby causing the photoelectric charge previously generated and stored in each photoelectric conversion element 11' in the first block to be transferred to, and stored in, a respective interline capacitor Ci. The electric charge stored in each interline capacitor Ci changes the potential of the respective common signal line 14. This changed potential is provided at output line 16 by sequentially turning on an analog switch SWi (i=1 to n) within a drive IC 15. The thin film transistors T2,1-T2,n to TN,1-TN,n of the second to Nth blocks are similarly turned on by gate pulses .phi.G2 to .phi.GN, whereby the electric charge from the respective photoelectric conversion elements in each block are similarly transferred. By sequentially reading the transferred electric charge, image signals corresponding to a single line in a main scanning direction of the document are obtained. The above operation is repeated by moving the document with document forwarding means such as rollers (not shown), thereby allowing the image signals of the entire document to be obtained. See Japanese Patent Unexamined Publications Nos. 9358/1988 and 67772/1988.
The structure of a TFT typically used in the above-described conventional image sensor and a method of preparing the TFT will be described. As shown in FIG. 5, which is a plan view, and FIG. 6, which is a sectional view, of a portion taken along a line B--B' in FIG. 5, the TFT used in the conventional image sensor has a reverse staggered structure.
Specifically, the TFT is formed by sequentially depositing on an insulating substrate 1 made of, e.g., glass or ceramic, a chromium (Cr) layer serving as a gate electrode 2, a silicon nitride (SiNx) film serving as a gate insulating layer 3, an amorphous silicon hydride (a-Si:H) layer serving as a semiconductor activated layer 4, a silicon nitride (SiNx) film serving as a channel protection insulating film 5 provided over the gate electrode 2, an n.sup.+ hydride amorphous silicon (n.sub.+ a-Si:H) layer serving as an ohmic contact layer 6, a chromium (Cr) layer serving as a drain electrode 7 and a source electrode 8, additional depositions of a polyimide insulating layer on the Cr layer, and a line layer 9a or an aluminum (Al) layer 9 on the channel protection film 5 to shield the a-Si:H layer.
Al layer 9, which shields the a-Si:H layer, is provided to prevent light from provoking photoelectric conversion. That is, Al layer 9 prevents light from traveling via channel protection film 5 and being injected into a-Si:H layer 4. Line 9a from transparent electrode 10 of photoelectric conversion element 11' is connected to drain electrode 7. Ohmic contact layer 6 is separated into partial layer 6a, which is in contact with drain electrode 7, and partial layer 6b, which is in contact with source electrode 8. The Cr layer serving as drain electrode 7 and source electrode 8 is similarly separated so as to cover ohmic contact layer portions 6a and 6b. This Cr layer serves not only to prevent Al line layers from being damaged during vapor deposition or sputtering but also to maintain the N.sup.+ a-Si:H property of ohmic contact layer 6.
A conventional method of preparing the TFT will be described with reference to FIGS. 5 and 6. A Cr layer serving as the gate electrode 2 is deposited on an insulated substrate 1 and subjected to photolithography to pattern the gate electrode 2 into a predetermined profile. A silicon nitride (SiNx) film serving as an insulating layer (gate insulating layer 3) for the gate electrode 2 is deposited. Next, an amorphous silicon hydride (a-Si:H) film serving as the semiconductor activated layer 4 is deposited on the gate insulating layer 3 by a plasma chemical vapor deposition (P-CVD) method. A silicon nitride (SiNx) insulating film (channel protection insulating film 5) is then deposited. The SiNx insulating film is patterned by photolithography to profile the channel protection insulating film 5. On the profiled channel protection insulating film 5, an n.sup.+ amorphous silicon hydride (n.sup.+ a-Si:H) serving as the ohmic contact layer 6 is deposited by the P-CVD method. The Cr layer to be formed into drain electrode 7 and source electrode 8 is deposited by DC magnetron sputtering, and a photoresist is applied to the surface of the Cr layer. The Cr layer is then patterned by a photolithographic process and an etching process such that an opening is formed over channel protecting insulating film 5. The Cr layer is then further etched to form drain electrode 7 and source electrode 8. Next, the Cr layer thus far processed is etched using a gas mixture of HF.sub.4 and O.sub.2. Finally, the Cr layer and the SiNx film are etched to pattern the N.sup.+ a-Si:H for the ohmic contact layer 6 and the a-Si:H layer for the semiconductor activated layer 4. Polyimide is then applied as an insulating layer. A contact hole is formed by photolithographic and etching process, and Al layer 9 serving as line layer or shielding layer is formed by depositing Al on the polyimide insulating layer by the DC magnetron sputtering.
In the above structure of the conventional TFT, a coupling capacitance is generated between the source electrode of a TFT and the drain electrode of an adjacent TFT. The drain electrode is subject to large voltage variations where the distance between adjacent TFTs is sufficiently small. As a result, the source electrode of the adjacent TFT is subjected to corresponding voltage variations.
To overcome this problem, a ground line for shielding the adjacent TFTs has heretofore been provided to prevent interference by the drain electrode of a TFT with the source electrode of an adjacent TFT. However, attempts to increase the resolution of image sensors, have required that photoelectric conversion elements be densely mounted. In the case shown in the plan view of FIG. 5, no ground line can be interposed between adjacent TFTs, thereby making it difficult for high-resolution image sensors to prevent interference between adjacent TFTs.